Todo

• Add IRQ driven shared mem to loader
• Finish loader
• Build SCcard headr to test spi based librarys
• mmc circuit
• fatfs circuit
• Port mmc code to Fatfs

Done

• Relase version of ucon64
• Release windows binary version
• Setup a dedicated website
• Label for package with serial number and logo
• port USBLoad
• BSNES fatfs
• MMIO in BSNES
• MMIO poc for snes
• USB Uploader for POC
• USB MEM Diff / Dump for SRAM research
• USB disasm
• USB cheatcode
• USB Remote CRC
• HiRom LoRom Logic for upload
• Cart IRQ patching
• Add avr reset button
• Fix CS bug and add additional gate
• Reduce to 2 Mbytes for 16 Mbits games
• Snes reset trigger, trade for counter down line
• No FTDI for the serial line
• Add RX/TX to pin header
• Model Snes connector header
• Jumper for bootloader enable
• Reduce to max 100mmm width
• 1,2 mm PCB for direct plug
• Blacksolder Mask
• White silk screen
• Test cartridges
• Tag current code
• Port current code base to new hardware
• Contact ucon64 team
• Build Debug header for serial communication

Research

• Trigger Cart IRQ and use IRQ Handler to inject code
• Test Memory mapped IO in Bsnes
• Test DSP Piggy back

Research Done

• How do we start games, JMP $8000 or jmp reset vector
• Analyse commerical roms ( Lo/Hi, Sram Size)
• Test 2 or 4 mbit commercial rom
• How many LoRoms have sram at bank 0x7d
• Analyse BSNES/ZSNES memory mapping
• Can we share memory, like mode 22 in Super FX cpu setups
• Test optixx ascii demo
• ROM CRC checking
• AVR CRC checking
• SNES CRC checking
• ucon64 mirror
• Where are the reset vectors
• How are mirrored roms layouted
• How does ucon64 handle demirror

Software

• Ucon64 Integration
• Action Replay Trainer Codes
• Real Time Debugger
• SDCard Support
• SNES Debug Console
• Remote Reset
• Peek and Poke Interface
• Disasm
• Gfx Grabber
• Memdump

Media

• hackaday
• nesdev.parodius
• nerdcore
• retrothing
• retromagazine.eu

Old Roadmap

Version 0.3

• MMIO support
• Savegame SRAM support
• DSP Piggyback
• FPGA managed Memmap
• FPGA softcore
• DSP emulation

Version 0.2

• Add avr reset switch
• Fix CS bug and add additional gate
• Reduce to 2 Mbytes for 16 Mbits games
• Snes reset trigger, trade for counter down line
• No FTDI for the serial line
• Add RX/TX to pin header
• Model Snes connector header
• 1,2 mm PCB for direct plug
• Blacksolder Mask
• White silk screen

Version 0.1

• AVRmega 644
• 4mb SRAM
• Address Counter
• Adress SREG
• Busdriver to AVR IO
• LO/HI rom support by AVR IO
• Selective Write enabled by AVR IO
• Cart IRQ support to AVR IO
• Software USB
• FTDI Debug Connection
• Tweak SRAM footprint
• WR Trigger to AVR IO
• CIC
• Connector for SDCard daughter board

  Pending

• CS Resistor
• 256 Byte Shared Memory
• Adapter cable

AVR Sram Poc

• 512k an AVR
• Latch 74hc573
• A/D vom Bus abkoppeln per IO

Cartrige Reverse

• LO Rom
• HI Rom
• Mad
• Cic

Memory Layout

• LO Rom
• HI Rom
• IPL Switch

Host System

• ARM Board
• JTAG Setup
• SDCard Setup